Hexagonal architecture (= Port & Adapter architecture)

  • ์œก๊ฐํ˜• ์•ˆ์ชฝ์— ๋„๋ฉ”์ธ๊ณผ ๊ด€๋ จ๋œ ๋น„์ฆˆ๋‹ˆ์Šค ๋กœ์ง์ด ๋“ค์–ด๊ฐ€๊ณ , ์œก๊ฐํ˜• ๋ฐ”๊นฅ์— ๋„๋ฉ”์ธ๊ณผ ์ƒ๊ด€์ด ์—†๋Š” ์ธํ”„๋ผ ์ฝ”๋“œ๊ฐ€ ๋“ค์–ด๊ฐ

  • Adapter: ์™ธ๋ถ€์—์„œ ๋“ค์–ด์˜ค๊ฑฐ๋‚˜ ๋‚˜๊ฐ€๋Š” ์š”์ฒญ์„ ์ฒ˜๋ฆฌ ํ•˜๋Š” ๋ถ€๋ถ„ (port๋ฅผ ํ†ตํ•˜๊ธฐ ์œ„ํ•ด ๊ฑฐ์ณ์•ผ ํ•˜๋Š” ๋ถ€๋ถ„) Port: Adapter์™€ ๋น„์ง€๋‹ˆ์Šค ๋กœ์ง ์ ‘๊ทผํ•˜๋Š” ํ†ต๋กœ (input, output ํ†ต๋กœ)

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